DVCon Bulletin February 2004  

Welcome to the second issue of the DVCon 2004 Bulletin
We are less than one month away to the premier confernce on the usage of Hardware Description Languages (HDLs), and Hardware Verification Languages (HVLs) for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera, DVCon 2004 will be held in San Jose, California, March 1-3, 2004

HIGHLIGHTS IN THIS ISSUE:


Discounted room rates are still available at the DoubleTree Hotel
$153 Single/Double
(408) 453-4000

Promotional Tutorials:

          Full Conference registration fee includes complimentary access to the promotional tutorials. 
The minimal cost for Exhibit-only registrants is $50 per promotional tutorial. 
Please visit http://www.dvcon.org/tutpromo.html

   Sponsored by Mentor Graphics, "Using PSL with HDL for Formal and Dynamic Verification" will be on Monday, March 1 from 8:00am - 12:00pm 
This tutorial provides technical and practical information on the application of Assertion-Based Verification (ABV) using Property Specification Language (PSL) for the definition, design, and verification of subsystems coded in HDL. For more information, and to register, please visit http://www.dvcon.org/tutpromo.html.

   Sponsored by OSCI, "System Design and Verification Using SystemC and SCV" will be held on Monday, March 1 from 1:00pm - 5:00pm
This tutorial will introduce SystemC as a powerful language for advanced system design using Platform Transaction Level Modeling. For more information on this tutorial and to register, please visit http://www.dvcon.org/tutpromo.html.

Luncheon Panel:

   Sponsored by Jasper Design Automation, "Next Generation Verification: Addressing the Challenges of Better Design Quality and Shorter Schedules" will be a luncheon on Wednesday, March 3 from 12:00pm - 1:30pm
Harry Foster, Jasper chief methodologist, will lead a panel sharing perspectives on why it's time to think differently about verification, getting the design bugs fixed closer to the source, what organizational/cultural changes need to take place and the move to greater designer accountability. For more information, please visit http://www.dvcon.org/lunchpan.html.


    Sponsors the DVCon 2004 Best Paper Award
You are the judge! Conference attendees will select the awards for Best Design Paper and Best Verification Paper. Each winner will receive $1,000.

DVCon Trivia
Which IEEE standard defines the Standard Delay Format (SDF)?
Answer is at the bottom of the Bulletin

Advance Registration Deadline
If you register by Tuesday, February 17th, you save $100 in full conference 
registration. Please visit http://www.dvcon.org/reg.html

Don't Miss Out on the 18 Exhibitors and 5 Consultants at the Show
For a list of exhibiting companies and industry consultants participating in DVCon, please visit http://www.dvcon.org/exlist.html.

The Latest News on Verification
For the latest news on verification from exhibiting companies and standards organizations, please visit http://www.dvcon.org

Trivia answer: IEEE 1497



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March 1-3, 2004
DoubleTree Hotel
San Jose, CA 
www.dvcon.org 
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